After hearing that I had interviewed for a position at Intel Corporation, my Carnegie Mellon University (CMU) classmate, Scott Robinson, remarked “I still have the grill marks.” Scott had joined Intel a year ahead of me and his comment referred to the intensive questioning he had experienced during his interview. While I was not puzzled by his comment, the tenor of my experience quite different–I had been wooed.
The first call came from Ken McQuhae at my Pittsburgh apartment. He asked a few questions, the key one: “Was I interested in a job at Intel?” “Yes.” The second call came from Wayne Needham. He asked some more technical questions, then asked if I planned to attend the International Test Conference in Baltimore, Maryland. I replied that I did, and he promptly offered to pay my way so that he could meet me. Thus began my interview process with Intel in the fall of 1993.
As I wrapped up my PhD program at CMU, I had shifted my job search from academic to industrial positions. My research via a fellowship was sponsored by the Semiconductor Research Corporation, SRC, who published a resume book. As an SRC sponsoring company, Intel had access to the resume book and that’s how Ken found my phone number. Intel liked to hire graduates from CMU. My fellowship with SRC had been structured so that half of the funding was a forgivable loan if I worked for a sponsoring company. This fact made Intel an attractive place to work, but my decision would ultimately be based on the job itself.
At the conference, I focused my time on presentations related to my research topic and meeting up with colleagues with whom I had connected during my previous attendance. I had a lunch meeting with Dan Grumbling, who worked in Oregon, and Wayne Needham, based in Arizona. Their questions covered a number of topics, including questions about my research on analog fault modeling. My questions revolved around the work environment and the nature of the group I would be joining. Next up was an on-site interview in Aloha, Oregon in early December. I contacted Derek Feltham, a former research-group colleague. He, too, worked at Intel–but more important, he liked to ski. With Mt. Hood just an hour or so away, I packed my ski clothes.
Ken had a new department to start, called Sort Test Technology Development (STTD.) While his primary focus was on hiring leaders to build groups, he was not opposed to hiring an individual contributor. As Wayne shared with me later, I was an “opportunistic hire,” hence providing a clue as to why this was a “woo” based interview. Ken had received his PhD in material science/metallurgy. As part of Portland Technology Development (PTD,) his previous position had him leading the semiconductor process integration group. So, while he was not familiar with electronics testing, he knew a heck of a lot about technology development. This fact explained why Wayne conducted the initial screening interview over the phone.
Two decades later as I recall the interview I can testify that while there were some “grilling” questions, it seemed more informational. I clearly remember some of the conversations I had with the interviewers. Ken assembled a team of managers who had experience in test and design. He wisely included Georgia Morgan because she had previously worked under Ken. Georgia provided her summary of Ken: “He has been the only manager who actually understood what I did and he always got me the resources I needed to do the job.” She stressed the second point and my experience with Ken, did, indeed, confirm that statement.
The interviews with the managers provided me a quick overview of their personalities, more so than the technology on which they worked. Dan Grumbling, whom I had met at ITC, managed PTD’s SRAM (static random-access memory) test team. Due to their regular structure, SRAMs provided an excellent vehicle to debug new processes. Dan questioned me on how I would take data and provide it to a co-worker. My response: “I would ask what format would be useful to them prior to starting the coding.” Sun Lin Chou, Ken’s boss, asked my thoughts about full scan logic design. I responded “It’s what they did at IBM and it provided high fault coverage.” Ken and Joe Schutz took me to lunch at the Chinese restaurant across the street from Intel’s Aloha campus. After lunch Joe asked me about how many hours a day I could see me working. He managed the microprocessor design team that provided the first product to ramp up the factory with the latest semiconductor process. Upon hiring I would promptly be put on loan to his team to implement a memory Design for Test circuit called Weak Write Test Mode.
The question that stood out came from Joe: “Don’t you think it’s odd that a senior vice president would be interested in testing?” Surprised by the question, I looked Joe in the eye. “Who was the senior vice president?” Joe wryly smiled “Sun Lin.” I didn’t ask Sun Lin his position and Sun Lin didn’t provide it– this amused Joe.
Of all the questions I asked, I truly recall one. I specifically queried Ken what it was that he saw in my resume to prompt the first phone call to me. His response—“Two things: PhD and fault models.” PhD–it opened the door; fault models–it got his attention. I am fascinated by defects. Intel had the largest sandbox for someone like me; I had a grand time playing in that sandbox.
Have a productive day,
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I might have had a chance to interview at other Intel groups if I was not attending ITC. The same week of ITC Intel was on the Carnegie Mellon University campus interviewing students ready for hire. As noted in the post, this was all about wooing me.
My initial research on analog fault modeling was presented in 1991 at the International Test Conference
I encourage you to read more about Sunlin Chou