I first heard this story as part of Kwabena’s presentation on OpenMV, a camera board. He spoke at the Oct 2016 Open Source Hardware Summit in Portland Oregon. As he described the path from idea to product I had an inkling this would be a good story for The Engineers’ Daughter. –Anne Meixner Ibrahim dreamed…
Category: Their Stories
The Unexpected Summer of Three Interns
In my engineering career the number three comes up often. A good software engineer goes through loops at least 3 times to check their software. You need to ask a manager three times to get the approval to do something new. One summer three interns came under my tutelage. That year our group could hire…
Innovation on I/O Timings, a Precursor—Tales from the Intel I/O Test Road Map
Growing up I heard the story of the Archimedes and his moment of inspiration in the bath. “Eureka” he declared racing to inform the King of his solution. This story propels the myth that great ideas come out of thin air. There is usually a lot more work and time behind an innovative idea. In…
Technical Speak- From the Weak Write Test Mode Saga
“You have excellent PowerPoint skills.” Joe Schutz had requested two slides on Weak Write Test Mode to include in a presentation to his manager. On loan to Joe’s microprocessor design team I reported into him via Doug Guddat who managed the memory design group. Joe had asked me directly for the slides and I delivered….
36 Views of Conversations with my PhD Advisor: View 2
Moments do exist in an engineering career when you question yourself. Am I in the right place? Am I good enough? Sometimes it gets bad enough that you fall into Imposter Syndrome. Firmly, I believe everyone has these moments. If they say they don’t then they are lying and don’t seek them for advice in…
Innovation on IO Timings with the Test chips—Tales from the Intel I/O Test Road Map
Our investigative work into the true nature of IO timing failures informed us of the current state of the art testing and the likely source of defects. The challenge to test the timings without using the traditional ATE approach was on. We even had an approach- stressing the timings on the die and self-compare. To…
Innovation I/O Timings, a Precursor—Tales from the Intel I/O Test Road Map
Growing up I heard the story of the Archimedes and his moment of inspiration in the bath. “Eureka” he declared racing to inform the King of his solution. This story propels the myth that great ideas come out of thin air. There is usually a lot more work and time behind an innovative idea. In…
I Need Her Feedback
Pete Magnani managed the technical training classes at IBM’s mid-Hudson Valley sites. He had created the test training class due to lack of teaching on this topic at college. The class lasted ten to twelve weeks, with each class session held for two hours. Each week we had a different IBM employee lecture about equipment,…
Pathfinding Work on No-Touch Leakage Testing, Part 3: Tales from the Intel I/O Test Road Map
On Willamette we proved that AC I/O loopback testing worked. The AC I/O loopback provided the designers margin. I had completed the groundwork for testing I/O leakage on the structural tester using the RC decay leakage method (link to previous post.) Alas, we didn’t get a chance to try it out on the structural tester….
Pathfinding Work on No-Touch Leakage Testing, Part 2: Tales from the Intel I/O Test Road Map
With AC I/O Loopback test method Intel, had embarked upon not relying upon Automatic Test Equipment (ATE) to explicitly test for Input/Output (I/O) circuit characteristics. The device under test (DUT) remained connected to ATE and tests like I/O voltage levels and I/O pin leakage were still tested by the ATE. As noted in an earlier post,…