Studying High-Speed I/O Failures: Tales from the Intel I/O Test Road Map

After successful deployment of AC I/O loopback for single-ended interfaces, we rapidly had to prepare for High Speed I/O (HSIO) circuitry. The HSIO derived from Serializer/Deserializer (aka SerDes) interfaces commonly used in telecommunications. Computer systems’ thirst for higher data rates drove the adoption of this interface architecture. These I/O circuits had significant differences from single-ended…